Questão de Arquitetura de Computadores

Suppose a empty cache memory composed of eight 2-way set associative lines that uses LRU mechanism for block replacement. Given the following sequence of block demands, mark the alternative that shows the correct number of hits and misses until the end of the sequence: 7:6 4:7

The cache memory is composed of eight 2-way set associative lines.

The cache memory uses LRU mechanism for block replacement.

Each line of the cache can contain two blocks with the same N last bits, where N = ext{log}_2 K (with K being the number of lines in the cache).

A
2 hits and 0 misses.
B
1 hit and 1 miss.
C
0 hits and 2 misses.
D
1 hit and 2 misses.

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